# -------------------------------------------------------------------------- #
#
# Copyright (C) 1991-2013 Altera Corporation
# Your use of Altera Corporation's design tools, logic functions 
# and other software and tools, and its AMPP partner logic 
# functions, and any output files from any of the foregoing 
# (including device programming or simulation files), and any 
# associated documentation or information are expressly subject 
# to the terms and conditions of the Altera Program License 
# Subscription Agreement, Altera MegaCore Function License 
# Agreement, or other applicable license agreement, including, 
# without limitation, that your use is for the sole purpose of 
# programming logic devices manufactured by Altera and sold by 
# Altera or its authorized distributors.  Please refer to the 
# applicable agreement for further details.
#
# -------------------------------------------------------------------------- #
#
# Quartus II 64-Bit
# Version 13.0.1 Build 232 06/12/2013 Service Pack 1 SJ Web Edition
# Date created = 10:39:23  November 14, 2024
#
# -------------------------------------------------------------------------- #
#
# Notes:
#
# 1) The default values for assignments are stored in the file:
#		PhaseComparator_assignment_defaults.qdf
#    If this file doesn't exist, see file:
#		assignment_defaults.qdf
#
# 2) Altera recommends that you do not modify this file. This
#    file is updated automatically by the Quartus II software
#    and any changes you make may be lost or overwritten.
#
# -------------------------------------------------------------------------- #


set_global_assignment -name FAMILY MAX7000S
set_global_assignment -name DEVICE "EPM7064SLC44-7"
set_global_assignment -name TOP_LEVEL_ENTITY PhaseComparator
set_global_assignment -name ORIGINAL_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name PROJECT_CREATION_TIME_DATE "10:39:23  NOVEMBER 14, 2024"
set_global_assignment -name LAST_QUARTUS_VERSION "13.0 SP1"
set_global_assignment -name VERILOG_FILE PhaseComparator.v
set_global_assignment -name PROJECT_OUTPUT_DIRECTORY output_files
set_global_assignment -name DEVICE_FILTER_PACKAGE PLCC
set_global_assignment -name DEVICE_FILTER_PIN_COUNT 44
set_global_assignment -name DEVICE_FILTER_SPEED_GRADE 7
set_global_assignment -name ERROR_CHECK_FREQUENCY_DIVISOR "-1"
set_global_assignment -name MIN_CORE_JUNCTION_TEMP 0
set_global_assignment -name MAX_CORE_JUNCTION_TEMP 85
set_global_assignment -name MAX7000_DEVICE_IO_STANDARD TTL
set_location_assignment PIN_17 -to dsw[1]
set_location_assignment PIN_16 -to dsw[2]
set_location_assignment PIN_14 -to dsw[3]
set_location_assignment PIN_12 -to dsw[4]
set_location_assignment PIN_29 -to la[0]
set_location_assignment PIN_28 -to la[1]
set_location_assignment PIN_27 -to la[2]
set_location_assignment PIN_26 -to la[3]
set_location_assignment PIN_25 -to la[4]
set_location_assignment PIN_24 -to la[5]
set_location_assignment PIN_21 -to la[6]
set_location_assignment PIN_20 -to la[7]
set_location_assignment PIN_8 -to pwm
set_location_assignment PIN_39 -to ena
set_location_assignment PIN_40 -to shdn
set_location_assignment PIN_4 -to clkactive
set_location_assignment PIN_43 -to clkuf
set_location_assignment PIN_2 -to clkur
set_location_assignment PIN_41 -to led
set_location_assignment PIN_33 -to enable
set_location_assignment PIN_18 -to gate_timer
set_location_assignment PIN_9 -to dataout
set_location_assignment PIN_11 -to sel[3]
set_location_assignment PIN_44 -to reset_counter
set_location_assignment PIN_19 -to sel[2]
set_location_assignment PIN_6 -to sel[1]
set_location_assignment PIN_5 -to sel[0]
set_location_assignment PIN_31 -to res4
set_location_assignment PIN_36 -to ur_leading
set_location_assignment PIN_37 -to res0
set_location_assignment PIN_34 -to res2
set_location_assignment PIN_1 -to res3