<?xml version="1" encoding="UTF-8"?>
<!DOCTYPE gowin-fpga-project>
<Project>
    <Template>FPGA</Template>
    <Version>5</Version>
    <Device name="GW5A-25A" pn="GW5A-LV25MG121NC1/I0">gw5a25a-002</Device>
    <FileList>
        <File path="src/ATx.v" type="file.verilog" enable="1"/>
        <File path="src/Antennenkoppler.v" type="file.verilog" enable="1"/>
        <File path="src/IntervalTimer.v" type="file.verilog" enable="1"/>
        <File path="src/RefMeas.v" type="file.verilog" enable="1"/>
        <File path="src/gowin_picorv32/gowin_picorv32.v" type="file.verilog" enable="1"/>
        <File path="src/gowin_pll/gowin_pll.v" type="file.verilog" enable="1"/>
        <File path="src/Antennenkoppler.cst" type="file.cst" enable="1"/>
        <File path="src/Antennenkoppler.sdc" type="file.sdc" enable="1"/>
    </FileList>
</Project>
