/*
┏━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┓
┃                                                                                                 ┃
┃          Program Name: project.h                                                                ┃
┃                Author: Michael Krämer                                                           ┃
┃                 Email: Michael@dk8pp.de                                                         ┃
┃                  Date: 01.08.2025                                                               ┃
┃                  Tool: GMD V2025.01                                                             ┃
┃                Device: GW5A-LV25MG121 Typ A                                                     ┃
┃               Version: 0.1                                                                      ┃
┃        Program status: still testing                                                            ┃
┃                                                                                                 ┃
┣━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┫
┃                                                                                                 ┃
┃  Purpose: Project specific global definitions and inclusion of project specific files.          ┃
┃                                                                                                 ┃
┣━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┫
┃                                                                                                 ┃
┃  © Copyright 2025-2026 Michael Krämer, DK8PP                                                    ┃
┃                                                                                                 ┃
┃  This program is free software: you can redistribute it and/or modify it under the terms of     ┃
┃  the GNU Lesser General Public License as published by the Free Software Foundation, either     ┃
┃  version 3 of the License, or (at your option) any later version.                               ┃
┃                                                                                                 ┃
┃  This program is distributed in the hope that it will be useful, but WITHOUT ANY WARRANTY;      ┃
┃  without even the implied warranty of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.      ┃
┃  See the GNU Lesser General Public License for more details.                                    ┃
┃                                                                                                 ┃
┃  You should have received a copy of the GNU Lesser General Public License along with this       ┃
┃  program.   If not, see <http://www.gnu.org/licenses/>.                                         ┃
┃                                                                                                 ┃
┃  ============================================================================================   ┃
┃                                                                                                 ┃
┃  Dieses Programm ist Freie Software: Sie können es unter den Bedingungen der GNU Lesser         ┃
┃  General Public License, wie von der Free Software Foundation, Version 3 der Lizenz oder        ┃
┃  (nach Ihrer Wahl) jeder neueren veröffentlichten Version, weiter verteilen und/oder            ┃
┃  modifizieren.                                                                                  ┃
┃                                                                                                 ┃
┃  Dieses Programm wird in der Hoffnung bereitgestellt, dass es nützlich sein wird, jedoch OHNE   ┃
┃  JEDE GEWÄHR,; sogar ohne die implizite Gewähr der MARKTFÄHIGKEIT oder EIGNUNG FÜR EINEN        ┃
┃  BESTIMMTEN ZWECK. Siehe die GNU Lesser General Public License für weitere Einzelheiten.        ┃
┃                                                                                                 ┃
┃  Sie sollten eine Kopie der GNU Lesser General Public License zusammen mit diesem Programm      ┃
┃  erhalten haben. Wenn nicht, siehe <https://www.gnu.org/licenses/>.                             ┃
┃                                                                                                 ┃
┗━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━━┛
*/

#ifndef _PROJECT_
#define _PROJECT_ 1

/*
╭─────────────────────────────────────────────────────────────────────────────────────────────────╮
│       Includes                                                                                  │
╰─────────────────────────────────────────────────────────────────────────────────────────────────╯
*/

/*
╭─────────────────────────────────────────────────────────────────────────────────────────────────╮
│       Defines                                                                                   │
╰─────────────────────────────────────────────────────────────────────────────────────────────────╯
*/

#define ADC_SS          0x8000  /* Single-shot conversion start */
#define ADC_MUX_AIN0    0x4000  /* use AIN0 vs. GND */
#define ADC_MUX_AIN1    0x5000  /* use AIN1 vs. GND */
#define ADC_MUX_AIN2    0x6000  /* use AIN2 vs. GND */
#define ADC_MUX_AIN3    0x7000  /* use AIN3 vs. GND */
#define ADC_FSR6144MV   0x0000  /* FSR = 6,144V */
#define ADC_FSR4096MV   0x0200  /* FSR = 4,096V */
#define ADC_FSR2048MV   0x0400  /* FSR = 2,048V */
#define ADC_FSR1024MV   0x0600  /* FSR = 1,024V */
#define ADC_FSR512MV    0x0800  /* FSR = 0,512V */
#define ADC_FSR256MV    0x0a00  /* FSR = 0,256V */
#define ADC_MODE_SS     0x0100  /* Power-down and single-shot mode */
#define ADC_DR8         0x0000  /* data rate is 8 samples per second */
#define ADC_DR16        0x0020  /* data rate is 16 samples per second */
#define ADC_DR32        0x0040  /* data rate is 32 samples per second */
#define ADC_DR64        0x0060  /* data rate is 64 samples per second */
#define ADC_DR128       0x0080  /* data rate is 128 samples per second */
#define ADC_DR250       0x00a0  /* data rate is 250 samples per second */
#define ADC_DR475       0x00c0  /* data rate is 475 samples per second */
#define ADC_DR860       0x00e0  /* data rate is 860 samples per second */
#define ADC_MODE_TS     0x0010  /* temperature sensor mode */
#define ADC_PULLUP      0x0008  /* enable pull-up on DOUT/DRDYn */
#define ADC_VALID       0x0002  /* data is valid, write config register */

#define ADC_CONFIG_ALL (ADC_FSR4096MV | ADC_DR128 | ADC_VALID | ADC_MODE_SS | ADC_SS)
//#define ADC_CONFIG_ALL (ADC_FSR4096MV | ADC_DR860 | ADC_VALID | ADC_MODE_SS | ADC_SS)

/* define configurations to convert a specific channel */
#define ADC_CONFIG0    ((ADC_MUX_AIN0 | ADC_CONFIG_ALL) << 16)
#define ADC_CONFIG1    ((ADC_MUX_AIN1 | ADC_CONFIG_ALL) << 16)
#define ADC_CONFIG2    ((ADC_MUX_AIN2 | ADC_CONFIG_ALL) << 16)
#define ADC_CONFIG3    ((ADC_MUX_AIN3 | ADC_CONFIG_ALL) << 16)
#define ADC_CONFIGT    ((ADC_MODE_TS  | ADC_CONFIG_ALL) << 16)

/* ADC state machine */
#define ADC_IDLE 0      /* ADC conversion is idle */
#define ADC_CONVERT0 1  /* ADC conversion for channel 0 is active */
#define ADC_CONVERT1 2  /* ADC conversion for channel 1 is active */
#define ADC_CONVERT2 3  /* ADC conversion for channel 2 is active */
#define ADC_CONVERT3 4  /* ADC conversion for channel 3 is active */
#define ADC_CONVERTT 5  /* ADC conversion for temperature is active */
#define ADC_SLOWTIMER 1000 /* wait time for next slow channel conversion in number of timer interrupts (10 s) */

#define RM_BASE             0x00    /* Base address of Reflection Measurement RM */
#define T1_BASE             0x40    /* Base address of Timer1 T1 */
#define AT_BASE             0x50    /* Base address of Asynchronous Transmitter ATx */
#define SI_BASE             0x60    /* Base address of system information */

#define RM_PDC_OFFSET       0x00    /* Phase Difference Counter offset */
#define RM_CREG_OFFSET      0x04    /* Control Register offset */
#define RM_SREG_OFFSET      0x08    /* Status Register offset */
#define RM_INTERVAL_OFFSET  0x0c    /* Measurement interval time */
#define RM_EC1_OFFSET       0x10    /* Edge Counter 1 offset */
#define RM_EC2_OFFSET       0x14    /* Edge Counter 2 offset */
#define RM_FC1_OFFSET       0x18    /* Frequency Counter 1 offset, forward frequency */
#define RM_FC2_OFFSET       0x1c    /* Frequency Counter 2 offset, reflected frequency */
#define RM_FHIGH_OFFSET     0x20    /* Forward signal high counter */
#define RM_FLOW_OFFSET      0x24    /* Forward signal low counter */
#define RM_RHIGH_OFFSET     0x28    /* reflected signal high counter */
#define RM_RLOW_OFFSET      0x2c    /* reflected signal low counter */

#define AT_TXB_OFFSET       0x00    /* Asynchronous Transmitter ATx offset of transmit buffer */
#define AT_BRGRLD_OFFSET    0x04    /* Asynchronous Transmitter BRG Reload register offset */
#define AT_TXBE_ACK_OFFSET  0x08    /* Asynchronous Transmitter ATx offset of interrupt acknowledge register */

#define T1_RLD_OFFSET       0x00    /* Timer1 offset to timer reload value register */
#define T1_CONFIG_OFFSET    0x04    /* Timer1 offset to Config register */
#define T1_ACK_OFFSET       0x08    /* Timer1 offset to interrupt acknowledge register */

#define CPUFREQ_OFFSET      0x00    /* CPU frequency offset to system information register base */
#define SAMPLINGFREQ_OFFSET 0x04    /* Sampling frequency offset to system information register base */
#define TRIGGER_LA_OFFSET   0x0c    /* write to generate trigger signal for logic analyzer */

#define TRIGGER0    0x00000001      /* write data to generate trigger signal */
#define TRIGGER1    0x00000002      /* write data to generate trigger signal */
#define TRIGGER2    0x00000004      /* write data to generate trigger signal */
#define TRIGGER3    0x00000008      /* write data to generate trigger signal */
#define TRIGGER4    0x00000010      /* write data to generate trigger signal */
#define TRIGGER5    0x00000020      /* write data to generate trigger signal */
#define TRIGGER6    0x00000040      /* write data to generate trigger signal */
#define TRIGGER7    0x00000080      /* write data to generate trigger signal */

/* Status register */
#define STATUS_VALID        0x00000001  /* valid result is available */

/* Control register */
#define CONTROL_STARTCYCLE  0x00000001  /* start a measurement cycle */

#define RM_PDC              ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_PDC_OFFSET))
#define RM_CREG             ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_CREG_OFFSET))
#define RM_SREG             ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_SREG_OFFSET))
#define RM_INTERVAL         ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_INTERVAL_OFFSET))
#define RM_EC1              ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_EC1_OFFSET))
#define RM_EC2              ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_EC2_OFFSET))
#define RM_FC1              ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_FC1_OFFSET))
#define RM_FC2              ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_FC2_OFFSET))
#define RM_FHIGH            ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_FHIGH_OFFSET))
#define RM_FLOW             ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_FLOW_OFFSET))
#define RM_RHIGH            ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_RHIGH_OFFSET))
#define RM_RLOW             ((uint32_t *)(OPEN_WB_BASE + RM_BASE + RM_RLOW_OFFSET))

#define AT_TXB              ((uint32_t *)(OPEN_WB_BASE + AT_BASE + AT_TXB_OFFSET))
#define AT_BRGRLD           ((uint32_t *)(OPEN_WB_BASE + AT_BASE + AT_BRGRLD_OFFSET))
#define AT_TXBE_ACK         ((uint32_t *)(OPEN_WB_BASE + AT_BASE + AT_TXBE_ACK_OFFSET))

#define T1_RLD              ((uint32_t *)(OPEN_WB_BASE + T1_BASE + T1_RLD_OFFSET))
#define T1_CONFIG           ((uint32_t *)(OPEN_WB_BASE + T1_BASE + T1_CONFIG_OFFSET))
#define T1_ACK              ((uint32_t *)(OPEN_WB_BASE + T1_BASE + T1_ACK_OFFSET))

/* CPU Frequency in Hz */
#define SI_CPUFREQ          ((uint32_t *)(OPEN_WB_BASE + SI_BASE + CPUFREQ_OFFSET))

/* Sampling Frequency in Hz */
#define SI_SAMPLINGFREQ     ((uint32_t *)(OPEN_WB_BASE + SI_BASE + SAMPLINGFREQ_OFFSET))

/* Trigger logic analyzer */
#define TRIGGER_LA          ((uint32_t * volatile)(OPEN_WB_BASE + SI_BASE + TRIGGER_LA_OFFSET))

#endif
